FIGS. 1 and 2 show a few steps in a current process for forming a semiconductor device (e.g., transistor) on a silicon-on-insulator (SOI) wafer. In FIG. 1, contact material 20 has been deposited in a process of forming a contact 22 to the substrate 24. The contact 22 is formed in a shallow trench isolation (STI) region 26. After the insulating material 28 is deposited for the STI regions 26 in the current process, the excess STI material 28 is removed until the pad nitride layer 30 is reached (e.g., using chemical-mechanical polishing (CMP)). When the excess STI material 28 is removed using CMP, for example, and the CMP process is stopped at the pad nitride layer 30, the STI regions 26 are left with a dish-shaped surface 32 (i.e., concave surface) due to the different polishing rates for the STI material 28 and the pad nitride layer 30. Then, when the excess contact material 20 is removed down to the pad nitride layer 30, as shown in FIG. 2, the top surface 34 of the structure 36 is planar, but residual contact material 38 remains in the dish-shaped recess of the STI regions 26. This residual contact material 38 at the STI regions 26 is undesirable for at least two reasons. The ability of the STI region to provide isolation may be degraded because the residual contact material 38 is conductive. Also, from a device point of view, transistor width may be undesirably increased due to residual contact material buildup in the sidewall. Thus, a need exists for a way to eliminate this residual contact material 38 in the dished STI regions 32, and preferably without adding additional steps to the process flow.